EN160 Design and Implementation of VLSI Systems

• Instructor: Prof. Sherief Reda
• Scalable Computing Systems Laboratory
• Meeting Times: MWF 10:00AM to 10:50AM
• Office Hours: MW 3:00PM to 4:00PM (you are very welcomed to stop by any other time)
• Location: B & H 194

TextBooks

HWs

• Solutions for all HWs are handed out in class on the due date. Solutions will not be posted on line. Please contact me if you need a copy.

Topics

• Introduction to VLSI Systems
• CMOS logic, fabrication and layout
• MOS Transistor theory
• Layout Design Rules
• Circuit characterization and performance estimation
• Circuit Simulation
• Combinational and sequential circuit design
• Memory system design
• Design methodology and tools

ABET form

Lectures

Project

The objective of the class project is to develop a protoype for an 8-bit subset of the MIPS processor in 0.5micron AMI process. Please see Lecture26 and Chapter 1 in your book for more details about the design of the processor. The entire class will collaborate on the design process, where each team takes a module of the processor and prototype it. An intergator will "stitch" the modules together to form the processor. The project proceeds in four phases:

Phase I (4-11 April). Standard Cell Library Design. Please make sure to functionally verify your cell design and include area/timing/power numbers in your report.

Phase II (11-18 April). Module Specification. You are required to study your part of the CPU and make sure you write down the input-output interface of your module as well as its specification.

Phase III (18-27 April). Module Prototyping. It is time to start designing and protoyping your module. In your report, make sure to include your (a) prototype layout, (b) functional (c) timing/area/power numbers. Make sure to provide clear description of how did you try to optimize / constrain your design in terms of area, time, power, and reliability.

Phase IV ( 28 April - 7 May) CPU Integration. Integration and presentation preparation. Brian have full authority to revise with you your design until it is 100% correct. He also has to piece together all the pieces to produce a functional IC prototype. He will report estimates of (1) the area (1) the speed, and (2) the power consumption of the processor.

Final 8-bit MIPS processor (0.5micron)

Total Area: 1.73 mm2. #Cells = 1346

Total Wirelength = 57.6 cm

Clock Frequency = 15MHz

Power Consumption = 10.8mA

• nominal 130nm spice models, nominal 180nm spice models, 0.5micron AMI models
• SmartSpice avi
• Spice and Tanner L-Edit tutorial by Kundan Nepal

Useful Websites

• Required book website
• Recommended book website
• EETimes
• Deepchip
• MOSIS