Lectures

Labs

Reading assignments

Class flyer

Projects

Useful links

EN2911X - Fall'07: Reconfigurable Computing

• Instructor: Prof. Sherief Reda
• Scalable Computing Systems Laboratory
• Meeting Times: T-Th 2:30PM to 3:50AM
• Office Hours: T-Th 11:00AM to 12:00PM (you are welcomed to stop by any other time)
• Location: B & H 194

Labs

Please check this page for engineering account information.

You will be using the following tools in the class labs

• Altera's DE2 board fitted with a Cyclone II EP2C35 FPGA.
  • Altera's tutorials
  • DE2 manual
  • DE2 pin assignment file (csv)
  • Cyclone II datasheet
• Altera Quartus II (V 7.0) compilation and physical synthesis environment together with SOPC builder
  • When you login to your engineering account, click Start -> choose Electrical -> Altera Quartus II
• Nios II soft processor
• Celoxica's Agility SystemC compiler

Lab 0. Please make sure to follow this tutorial from Altera before you attempt any of the lab problems.

Lab 1. Verilog skills. You are required to design at least two games out of the specified three games. Due date is October 4th for first game and October 9th for second game. Please download the lab assignment.

Helpful notes for Lab 1.

• Details on programming the 7-segment display are given in page 30 of the DE2 manual.
• Details on programming the switches and push buttons are given in page 26 of the DE2 manual.
• Details on programming the LEDs are given in page 26 of the DE2 manual.
• Note that we have covered in the class the synthesizable subset of Verilog for Altera's Quartus II. Verilog has more constructs and features that can be useful for simulations purposes.

Lab2. Hardware acceleration using custom instructions. Please make sure to go through this tutorial from Altera on creating and programming the Nios II system. Then you should read and understand how to create custom instructions for the Nios II system.

Please download the lab assignment and break it down into mini-assignment as described in the assignment document. You might need to adjust the clock frequency (either speedup it up or slowing it down) of the Nios II system. Here is a tutorial on how to do it.

Lab3. SystemC skills. Please make sure to go through the examples in lecture 14 &15 and read Chapter1 in the Celoxica reference manual before trying the lab exercise. I have also added new section on SystemC resources in the Useful links webpage. The synthesizable subset of SystemC is given in Chapter 2 of the Celoxica's manual. Here is the lab assignment. Please note that you might need to use the pin assignment editor in Quartus II tool in case Celoxica tool alters the names of the input/output ports.